PIC16F873A-I/SO【PDF 15/234 页】IC MCU FLASH 4KX14 EE 28SOIC

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2003 Microchip Technology Inc.

DS39582B-page 109

PIC16F87XA

9.4.17.3

Bus Collision During a Stop

Condition

Bus collision occurs during a Stop condition if:

After the SDA pin has been deasserted and

allowed to float high, SDA is sampled low after

the BRG has timed out.

After the SCL pin is deasserted, SCL is sampled

low before SDA goes high.

The Stop condition begins with SDA asserted low.

When SDA is sampled low, the SCL pin is allowed to

float. When the pin is sampled high (clock arbitration),

the Baud Rate Generator is loaded with SSPADD<6:0>

and counts down to 0. After the BRG times out, SDA is

sampled. If SDA is sampled low, a bus collision has

occurred. This is due to another master attempting to

drive a data ‘0’ (Figure 9-31). If the SCL pin is sampled

low before SDA is allowed to float high, a bus collision

occurs. This is another case of another master

attempting to drive a data ‘0’ (Figure 9-32).

FIGURE 9-31:

BUS COLLISION DURING A STOP CONDITION (CASE 1)

FIGURE 9-32:

BUS COLLISION DURING A STOP CONDITION (CASE 2)

SDA

SCL

BCLIF

PEN

SSPIF

TBRG

SDA asserted low

SDA sampled

low after TBRG,

set BCLIF

‘0’

SDA

SCL

BCLIF

PEN

SSPIF

TBRG

Assert SDA

SCL goes low before SDA goes high,

set BCLIF

‘0’

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